for my final work of my studies I should implement my developed transceiver IP Core in the Reference Design of Analog Devices. I am using the Zedboard and the FMCOMMS2.
In the figure below I am showing my thoughts how to implement my IP Core in the Reference Design. I am not sure if it is correct because during the test I recognized that the DAC_enable signals are low-active. How is it possible to set the dac_enable high-active? Furthermore, I am not sure if it is correct to insert my own IP during the axi_ad9361_dac_dma and the util_dac_unpack. Is it also possible to neglect the dac_unpack because the output of my IP core are also I-Q data.
For the receiving part I am thinking to implement my IP Core between util_adc_pack and axi_ad9361_adc_dma. Would it be also possible to neglect the adc_pack core?