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ADF4351 PLL Lock problem

Question asked by pichonro on Jul 30, 2015
Latest reply on Aug 12, 2015 by rbrennan

Hello,

 

I made a prototype with a ADF4351 to generate a 300 MHz signal.

 

But the PLL doesn't lock. The signal is at the good frequency but it sweeps.

 

I attached the output signal and the digital lock detect signal.

 

I have a 35 KHz loop filter like evaluation board and a LC balun for a 300-460 MHz output signal.

 

I don't think it is a programming problem because the chip responds to my orders.

 

Thanks in advance for your help.

 

Best Regards

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