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How to divide CLKOUT of ADN2915 CDR in LTD mode

Question asked by Se-woong on Jul 30, 2015
Latest reply on Jul 30, 2015 by Dongfeng



My customer want to use clkout signal of ADN2915 as the trigger signal of DCA.

And they  used 10Gbps signal as input signal of datain at ADN2915.

As you know, in LTD mode, ADN2915 will output a recovered clock frequency in a half rate of the input signal.

So they can get 5GHz clkout signal of ADN2915.


But unfortunately the max. trigger operation range of DCA is 2.5Ghz.

So they need some advice for dividing clkout signal of ADN2915.



Would you let me know how to get 2.5GHz clkout signal at 10Gbps Datain of ADN2915?


Please advise me.


If you have any questions, please let me know.