I don't understand the working of the writeback trigger circuit on EVAL-ADAU1701 MINIZ board as explained on page 7 of the documentation file EVAL-ADAU1701MINIZ.pdf
It seems to me that if the two large capacitors are situated on the **input** of the voltage regulator, the base of Q2 will not see a dump until it is too late to do a writeback. I think that C15 and C16 could/should be on the output of the voltage regulator (stability ??) or that there must be an isolation diode between DVDD and the input of the voltage regulator (with a discharging resistor to ground) like on the enclosed sketch.
May be there is error in the schematic of the board shown on page 8 ? And the question is : how works the evaluationboard ?