AnsweredAssumed Answered

ADV7619 and HDCP

Question asked by boweiguo on Jul 29, 2015
Latest reply on Jul 31, 2015 by DaveD

When use the first source,ADV7619 work well. The regiter(HDMI-0X05) indicate the input stream processed by HDMI core is not HDCP encrypted.

When use the second source,it display nothing. The regiter(HDMI-0X05) indicate the input stream processed by HDMI core is HDCP encrypted.

which register i configed wrong?

err += ADV_ProgW(sel,ADV_IO_SLA,0xFF,0x80); //I2C RESET

  err += ADV_ProgW(sel,ADV_IO_SLA,0xF4,ADV_CEC_SLA); //set the addr for the CEC-------80

  err += ADV_ProgW(sel,ADV_IO_SLA,0xF5,ADV_CEC_SLA); //set the addr for the INFOFRAME-7C

  err += ADV_ProgW(sel,ADV_IO_SLA,0xF8,ADV_DPLL_SLA); //set the addr for the DPLL-----4C

  err += ADV_ProgW(sel,ADV_IO_SLA,0xF9,ADV_KSV_SLA); //set the addr for the KSV-------64

  err += ADV_ProgW(sel,ADV_IO_SLA,0xFA,ADV_EDID_SLA); //set the addr for the EDID-----6C

  err += ADV_ProgW(sel,ADV_IO_SLA,0xFB,ADV_HDMI_SLA); //set the addr for the HDMI-----68

  err += ADV_ProgW(sel,ADV_IO_SLA,0xFD,ADV_CP_SLA); //set the addr for the CP---------44


  err += ADV_ProgW(sel,ADV_IO_SLA,0x74,0x00); //Disable the Internal EDID for all ports




      err += ADV_ProgW(sel,ADV_EDID_SLA,i,ADV_Default_EDID[i]);//how to describe the address?



  err += ADV_ProgW(sel,ADV_IO_SLA,0x71,0x00); //Set the Most Significant Bit of the SPA location to 0

  err += ADV_ProgW(sel,ADV_KSV_SLA,0x52,0x20); //Set the SPA for port B

  err += ADV_ProgW(sel,ADV_KSV_SLA,0x53,0x00); //Set the SPA for port B.

  err += ADV_ProgW(sel,ADV_KSV_SLA,0x70,0x9E); //Set the Least Significant Byte of the SPA location

  err += ADV_ProgW(sel,ADV_KSV_SLA,0x74,0x01); //Enable the Internal EDID for ports A


  err += ADV_ProgW(sel,ADV_HDMI_SLA,0xC0,0x03); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x00,0x08); //set port B as a background

  err += ADV_ProgW(sel,ADV_IO_SLA,0x01,0x06); //Prim_Mode =110b HDMI-GR

  err += ADV_ProgW(sel,ADV_IO_SLA,0x02,0xF2); //Auto CSC, RGB out, Set op_656 bit

  err += ADV_ProgW(sel,ADV_IO_SLA,0x03,0x54); //2x24 bit SDR 444 interleaved mode 0

  err += ADV_ProgW(sel,ADV_IO_SLA,0x04,0x60); //27M crystal

  err += ADV_ProgW(sel,ADV_IO_SLA,0x05,0x28); //AV Codes Off

  err += ADV_ProgW(sel,ADV_IO_SLA,0x06,0xA0); //No inversion on VS,HS LLC pins,Negative polarity of HS VS

  err += ADV_ProgW(sel,ADV_IO_SLA,0x0C,0x42); //Power up part

  err += ADV_ProgW(sel,ADV_IO_SLA,0x14,0x6A); //Driver length for data/clk/sync

  err += ADV_ProgW(sel,ADV_IO_SLA,0x15,0xB0); //Disable Tristate of Pins-----A0/80

  err += ADV_ProgW(sel,ADV_IO_SLA,0x19,0x93); //LLC DLL phase----------------

  err += ADV_ProgW(sel,ADV_IO_SLA,0x33,0x40); //LLC DLL MUX enable

// err += ADV_ProgW(sel,ADV_IO_SLA,0xBF,0x00); //2x24 bit SDR 444 interleaved mode 0

  err += ADV_ProgW(sel,ADV_IO_SLA,0xDD,0xA0); //LLC Half frequency

  err += ADV_ProgW(sel,ADV_DPLL_SLA,0xB5,0x01); //Setting MCLK to 256Fs

  err += ADV_ProgW(sel,ADV_DPLL_SLA,0xC3,0x80); //ADI recommended writes for 2x24 bit (HiFreq)

  err += ADV_ProgW(sel,ADV_DPLL_SLA,0xCF,0x03); //ADI recommended writes for 2x24 bit(HiFreq)

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0xC0,0x03); //ADI Required write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x00,0x08); //Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b)

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x02,0x03); //ALL BG Ports enabled

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x03,0x98); //ADI Required Write-------AUDIO

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x10,0xA5); //ADI Required Write-------25-NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x45,0x04); //ADI Required Write--------NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x97,0xC0); //ADI Required Write--------NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x3D,0x10); //ADI Required Write--------NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x3E,0x69); //ADI reccommended writes---NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x3F,0x46); //ADI reccommended writes---NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x4E,0xFE); //ADI reccommended writes---NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x4F,0x08); //ADI reccommended writes---NONE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x50,0x00); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x57,0xA3); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x58,0x07); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x6C,0x62); //HPA OUTPUT AFTER +5V DETECTION 0~1.5S,NOW IS 0.4S

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x83,0xFC); //Enable clock terminators for port A & B

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x84,0x03); //FP MODE

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x85,0x10); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x86,0x9B); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x89,0x03); //HF Gain

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x9B,0x03); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x93,0x03); //ADI Recommended Write

  err += ADV_ProgW(sel,ADV_HDMI_SLA,0x5A,0x80); //ADI Recommended Write