Let me first apologize for my English.
To be honest, I'm mostly a programmer, not a radio engineer, and my questions may be incorrect, but I will try to ask.
I have an AD9364 in my device. I have an a task to receive two channels using this circuit. F(ch1) = 1 GHz, F(ch2) = 1,002 GHz.
When the difference between levels of signals is big, I can't receive the channel with small level. And I can't estimate levels of each channel. Because of AGC, I guess. Data processing is performed on the FPGA. And I noticed that the data do not take up 12 bits that are allocated for them. I think that the ADCs are not completely filled, are not it?
So, I have some questions. Is it possible to use the analog path gain so that the level of the two signals relative to each other will not be changed? And how to fill all internal ADCs bits?
I mean, I need only to avoid overflow of internal ADCs without amplification of one of the two received signals. And, if possible, fill in all bits of ADCs.
I suppose that for these purposes more suitable AD9361, but unfortunately, I did not take part in the development scheme of the device.
Thank you for your attention. I hope, you will help me.