i am successfully using fmcomms2 with zed board, but i will like to ask you why some port are not connected in axi_ad9361 ip ?
please check the attach document.
Thanks and regard's
You can ignore them-- these are grounded by the synthesis tool. We will remove the warnings (by driving them to ground ourselves) in the next release -- just a cosmetic change to keep the tool happy (also to filter out the unintentional left outs).
Moved to FPGA Reference Designs.
As you see in PDF, it is reference design block design, i am already working on reference design and successfully using it. i just wanted to know these pin left unconnected.
In general - they are not required, but without seeing them I can't say for sure. Do you have the list in plain text (sorry I am not good at graphical stuff)?
Hi Rajeesh sir,
These are the pin in reference design are unconnected
[BD 41-759] The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified.
Please check your design and connect them if needed:
Thanks and Regard's
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