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axi_dmac Destination Data Width ERROR

Question asked by Muhammet on Jul 10, 2015
Latest reply on Aug 11, 2015 by Muhammet

Hi,

 

I am using FMCOMMS1 with KC705 carrier board. I customize the reference design. I need to transfer 8 bit data with adc_clk from memory to my custom IP. So I added axi_dmac core with the configurations on the below picture.

It has same configuration with axi_ad9122_dma except C Dma Data Width Dest which I changed from 64 to 8. fifo_rd_clk is tied to adc_clk.

 

I got the synthesis error as below.

 

How can I resolve this problem?

 

Thanks,

 

Muhammet Özgür

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