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ASM "memory" Register Constraint Not Compiling

Question asked by LloydE on Jul 9, 2015
Latest reply on Jul 13, 2015 by LloydE

I am trying to port some GCC Blackfin inline assembly code to the BF536 using VisualDSP++ 5.0.10.0. The GCC inline assembly register constraints in the original source were "m" (meaning they could be assigned to any memory location) so I changed them to "memory" (according to "VisualDSP++5.0 C++ Compiler and Library Manual for Blackfin® Processors Revision 5.4, January 2011", table 1.24, "Register Names for asm() Constructs"). However this still gives me the following errors:

 

line 60: cc1101:  error: invalid constraint in asm statement
     : "=memory" (res)
       ^

line 61: cc1101:  error: invalid constraint in asm statement
     : "memory" (a), "memory" (bb)
       ^

line 61: cc1101:  error: invalid constraint in asm statement
     : "memory" (a), "memory" (bb)
                     ^ 

 

Here is the code I am trying to compile (with line numbers) which gives the errors:


42: static inline spx_word16_t PDIV32_16(spx_word32_t a, spx_word16_t b)
43: {
44:  spx_word32_t res, bb;  
45:  bb = b;  
46:  a += b>>1;  
47:
47:  __asm__  (        
48:    "P0 = 15;\n\t"        
49:    "R0 = %1;\n\t"        
50:    "R1 = %2;\n\t"        
51:    //"R0 = R0 + R1;\n\t"        
52:    "R0 <<= 1;\n\t"        
53:    "DIVS (R0, R1);\n\t"        
54:    "LOOP divide%= LC0 = P0;\n\t"        
55:    "LOOP_BEGIN divide%=;\n\t"           
56:    "DIVQ (R0, R1);\n\t"        
57:    "LOOP_END divide%=;\n\t"        
58:    "R0 = R0.L;\n\t"        
59:    "%0 = R0;\n\t"  
60:   : "=memory" (res)  
61:   : "memory" (a), "memory" (bb)  
62:   : "P0", "R0", "R1", "ASTAT" BFIN_HWLOOP0_REGS);

63:
64:     return res;
65: }

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