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AD9364 Reference Clock Input Voltage

Question asked by etar on Jul 8, 2015
Latest reply on Jul 14, 2015 by etar

  Hi!

Answering question about reference clock voltage (https://ez.analog.com/message/173257#173257) tlili wrote:

 

      Recommendation is to maximize voltage swing without exceeding 1.3V supply level.

      Most applications use 1.1Vpp-1.2Vpp swing to allow for some margin.


Is it correct if I feed AD9364 with clipped sin wave 40 MHz, 1 Vp-p from external clock generator (0.8Vp-p output voltage in datasheet)?

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