I've selected ADM12914-2 to monitor +15V and -15V supply rails of an ADC board prototype. I used the recommended configuration by Figure 25 from datasheet,
Using the design process recommended in the datasheet for a +/-15V PSU, VCC connected to a separate +5V rail and timer disabled, I've calculated the following circuit considering my tolerance requirements:
But our prototype isn't working properly. Both UV and OV are always at low state, i.e., accusing simultaneous under- and overvoltage.
Measurements showed that VH1/VH4 are always +0,51V and VL1/VL4 0.48V, which is within the ADM12914-2 tolerance specs. I've also tried changing rails voltage to UV/OV conditions and toggled the DIS pin state, but without success;.
After reading again the full datasheet, I noticed something that looked weird to me. The recommended circuit from Figure 25 connects SEL to GND. According to Table 5, inputs 3 and 4 will work in negative polatiry, thus the UV condition is VL3/VL4 > 0.5V and OV condition is VH3/VH4 < 0.5V.
I think the recommended circuit makes sense for the input 4, and my measurements are within the calculated operation point. But the input VH3 is connected to GND, so would it always trigger OV condition? The same question applies to input VL3, which is tied to +15V, fulfilling the UV condition.
Because SEL input only swaps the UV/OV signals, the problem would persist if I change its connection, because the voltage constraints are still the same. So the recommended circuit will always trigger both UV/OV conditions.
Is there any error in my analysis? If not, is there a way to fix my circuit with the least physical intervention in my board? It seems that swapping VH3 and VHL pins would solve it, but I don't think I'll be able to tie some wires in such small pins without messing everything up =P
Thanks in advance,