I am using TWI peripheral of BF592 processor. From our understanding, at any time TWI works either as master or slave only. But following sentences in HRM are confusing.
On Page No. 12-2: The TWI controller includes these features:
• Simultaneous master and slave operation on multiple device systems
on Page No. 12-40: By using the status and control bits provided, the FIFO can be managed to allow simultaneous master and slave operation.
Whether these are documentation errors? Please advice.