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AD7982 Conversion problem

Question asked by Sienimak on Jul 4, 2015
Latest reply on Jul 28, 2015 by KarenNE

Hello,

 

there is something strange behaviour of EVAL-7982-PMDZ board. The board is fitter with 18 bit AD7982 chip. The system setup is ZedBoard with EVAL-7982-PMDZ. Waveforms I have recorded with Analog Discovery and Simulink. The system is running hardware-in-the-loop with freerunning mode. That way I could read the samples to Simulink.

 

Problem: AD-Converter doesn't see input voltages between 0 - 2,5 V. But from 2,5 to 5 V conversion is ok.

 

Test 1: Applying 0,0 V to board and AD-converter input

Picture 1. 2nd line serial data = 4386, 3rd line Convst signal, 4th line serial clock. Reading should be close 0.

 

Test 2: Applying 0,1 V to board

Picture 2: Serial data "jumps" to 79595! Actually this happens on 30 mV point.

 

Test 3: Aplying voltages from 0,1 to 2,5 V. Results are exactly same as on picture 2.

 

Test 4: Applying sine wave to AD converter.

Picture 3. Supplied sine wave to board and AD-converter input. Offset is 2,5 V and amplitude 2 V.

 

Now we can see readings in Simulink scope as on picture 4.

Picture 4. Reading from Simulink. Half wave is missing from 2,5 V to 0 V! The reading will stay approx 79595 at half wave! I have scoped the AD-converter input pin too. I can cofirm that the correct sine wave is coming to ad-input pin.

 

Used board schema is presented at picture 5.

Picture 5. EVAL-7982-PMDZ schematic. Source: Analog Devices, Wiki.

 

What is wrong with this AD7982 converter? The ic is marked with C5F code and then it should be 18 bit AD7982. The board is supplied with +7,5 V and -2,5 V power supplies.

 

I have done similar way connections to AD7980 and system is running correctly in 16 bit resolution. Now the problem is not in software or in hdl code/ip core. The problem can be seen on serial data waveforms. I id made 5th test and slowed down hole process. The total time for single sample was 4,5 us and results are still same. So it can not be too hard clock signal.

 

Test 5. Slowed process and applying 0,1 V to AD input

Picture 6. Total sampling time is 4,5 us. Stil voltage-reading area from 0 to 2,5 V is missing.

 

Best Regards Antti

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