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Writing to the DAC in Verilog with FMCOMMS1 Design

Question asked by tjdub21 on Jul 1, 2015
Latest reply on Oct 19, 2015 by rejeesh
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I am using the FMCOMMS1 reference design and would like to write to the DAC with my own desired values. I have been able to generate a bitstream, export to SDK, modify the DAC data, and write to the DAC in the reference design. However, I would like to write to the DAC in Verilog code. Is there a way to do this? I can see that DAC data is being written to in the system_top.v file. I would like to do this is Vivado and not in SDK.

 

How do I write specific values to the DAC in the system_top.v? Is this possible?

 

I am developing this on the KC705 board.

 

Thank you!

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