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I2C interface of ADI's video products

Question asked by Kikka on Jun 29, 2015
Latest reply on Jul 1, 2015 by Kikka

Hello.

 

Let me ask about I2C interface of ADI's Video Products.

 

Does I2C interface of ADI's video products support Bus Clear function?

The following is the description of Bus clear function extracted from "I2C-bus specification and user manual"

 

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3.1.16 Bus clear

In the unlikely event where the clock (SCL) is stuck LOW, the preferential procedure is to

reset the bus using the HW reset signal if your I2C devices have HW reset inputs. If the

I2C devices do not have HW reset inputs, cycle power to the devices to activate the

mandatory internal Power-On Reset (POR) circuit.

If the data line (SDA) is stuck LOW, the master should send nine clock pulses. The device

that held the bus LOW should release it sometime within those nine clocks. If not, then

use the HW reset or cycle power to clear the bus.

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If they doesn't support Bus clear, how does ADI's video products behave when the master send nine clock pluses?

 

Best regards.

Kikka

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