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DDR2 Clock config using ADI drivers

Question asked by ANANDSM on Jun 27, 2015
Latest reply on Jul 2, 2015 by Jithul_Janardhanan

Hi All,

I am using BF607 and trying to configure the DMC for accessing 64MX16 DDR2 on our custom board.

I am using the following API statements for configuring the processor clocks and are set properly

pwrresult = adi_pwr_Init(MAX_CLOCKIN_FREQ, MAX_CORE_CLOCK_FREQ,


pwrresult = adi_pwr_SetFreq(CORE_FREQ_SET, SYSCLK_FREQ_SET);

I have set the core clock to 500MHz and the system clocks are 50MHz each.

I have used BfSdcDmcCalculation_Release.xlsx to config the DMC and the values are shown below for 133MHz

     status = *pREG_DMC0_STAT;

    if(!(status & 0x2))


        *pREG_DMC0_CTL = 0x00000800;

        *pREG_DMC0_CFG = 0x00000422;

        *pREG_DMC0_TR0 = 0x20806212;

        *pREG_DMC0_TR1 = 0x2011040D;

        *pREG_DMC0_TR2 = 0x00322506;

        *pREG_DMC0_MR = 0x00000452;

        *pREG_DMC0_EMR1 = 0x00000004;

        *pREG_DMC0_EMR2 = 0x00000000;

        *pREG_DMC0_PADCTL = 0x00044400;

        *pREG_DMC0_PHY_CTL1 = 0x00000000;

        *pREG_DMC0_PHY_CTL3 = 0x050000C0;

        *pREG_DMC0_CTL |= 0x00000004;

        while(*pREG_DMC0_STAT & 0x2 != 0x2);

        while(*pREG_DMC0_STAT & 0x2000 != 0x2000);


when I read the ddr clock frequency using pwrresult = adi_pwr_GetDDRClkFreq(&fddrClk); its returning 62.5MHz and also if I monitor the DMC0_CK/DMC0_CK' in oscilloscope, its 62.5MHz

Could anyone let me know how to configure the DDR2 clock.


Anand M