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Stable LLC output timing for ADV7180

Question asked by Kikka on Jun 25, 2015
Latest reply on Jun 29, 2015 by Kikka

Hello.

 

Let me confirm about ADV7180.

Please tell me the time until LLC clock becomes stable after reset is de-asserted.

 

<Condition>

input---None

Xtal clock---stable

 

In other words, because of no input, it means the time until Free Run begins after reset is de-asserted.

 

Best regards.

Kikka

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