I found problems in (i think) PLL of ADF4350.
at 1750MHz seems to be some difficults in PLL lock ..
see please the attached picture "ADF4350_PROBLEM_1700MHz.JPG" (HP8591E SA)
(i apologize for the low quality of the spetcrum analyzer screenshots)
Attached also the "SIMPLL" data file for the values of the filter components and project datas.
(10MHz ref., channel spacing 10MHz, out from 600 to 4000 MHz, RF divider OUTSIDE loop)
actual filter components value:
C1 2.2pF (SIMPLL requires 2.48pF)
C2 33pF (SIMPLL requires 33.7pF)
C3 1pF (SIMPLL requires 1.13pF)
R1 13.5Kohm (27K/2) (SIMPLL requires 13.2Kohm)
R2 27Kohm (SIMPLL requires 27.0Kohm).
Counters programming datas (for the showed examples):
F>1700 MHz - INT>340 - RFdiv>:/2
F>1750 MHz - INT>350 - RFdiv>:/2
F>1000 MHz - INT>400 - RFdiv>:/4
what wrong ??