I'm trying to synchronize 4 AD9915 devices on a custom PCB with an FPGA controlling them. I believe I am successful in synchronizing them as I can observe the signals at 90 MHz in phase on a oscilloscope after running through the procedure recommended to achieve this (note they are note phase aligned before the procedure is executed). However, when I set the "Clear Phase Accumulator" bit in CFR1, then clear the bit, and generate another waveform, they appear to no longer be synchronized as the output phase is not the same on all devices.
After simply commenting out the line in my VHDL that sets the "Clear Phase Accumulator" bit high, the signals remain in phase with each other during the same code execution. In other words, it appears that commenting out the use of this bit has resolved the problem. However, I'm concerned that now I will not be able to accurately control the phase of my waveforms since I cannot reset the phase accumulator if I want the devices to remain synchronized.
My question is this: Am I supposed to be able to use the "Clear Phase Accumulator" bit when using multiple AD9915 devices that are synchronized? Is there something else I may be missing?
Any help would be greatly appreciated!