AnsweredAssumed Answered

ADV7393 in SD non interlaced mode

Question asked by zanzibar on Mar 30, 2011
Latest reply on Apr 6, 2011 by DaveD

Hi,

 

I would like to have more information regarding ADV7393 in SD non interlaced mode when input is : 10 bit 4.2.2 YCrCb

 

Do we need to double clock frequency to 54 Mhz ?

How to generate VS and HS synchro signals when these signals are provided ?

What is frame form when using EAV/SAV mode ?

Outcomes