I am investigating the ADF4158 PLL for a new design, but was not able to deduce the following form the data sheet:
I need a linear frequency sweep with a duration of approx. 500-600 microseconds, with max number of steps (256 ?) over a 2.5 % relative bandwidth. The PLL doesn't need to lock during this short sweep, but should still generate a linear ramp. Is this possible ?
Also, when not sweeping, I want to transmit FSK data at a fixed center frequency, or PSK, if this allows a higher data rate. What is the maximum data rate in both cases ? I am aiming for about 500 kbit/s.