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ADE7880: Softreset and IRQ1

Question asked by borstel on Jun 16, 2015
Latest reply on Jun 28, 2015 by borstel



I implemented a software reset as described in the manual at p.25.:

- set Bit 7 (SWRST) in the CONFIG register

- polling this bit until it is reset to 0

- polling Bit 15 (RSTDONE) in the STATUS1 register until set to 1

- acknowledge RSTDONE by writing RSTDONE=1 into STATUS1

This procedure hangs up.


My discovery:

- after hardware reset IRQ1 stays low until I acknowledge RSTDONE by writing RSTDONE=1 into STATUS1

- if IRQ1 is high RSTDONE seems always to read as 0

If I do not care STATUS1 after power on, my software reset hangs at 2nd time (1st time IRQ1 is still low),

if I acknowledge RSTDONE after power on, IRQ1 goes high and the 1st software reset hangs.


What is the right procedure?


With a timeout in the RSTDONE-polling-loop it seems to work (IRQ1 always high).

My system is not running yet satisfying, so I do not know if this is cause or effect.


BTW: I did not used IRQ1 anyway and I do not need it.