i notice that nearly every test figures are based on -1dBFS input signal, and i just wonder why it is -1dBFS, not -2dBFS, or -4dBFS. Could you please help me clarify it.
The -1dBFS test target is somewhat of an industry standard and is primarily chosen as a conservative signal level to insure the ADC is operating within its specified full-scale range without risking clipping >0dBFS. Many datasheets will include an Ain Amplitude Sweep plot that shows additional performance at reduced analog input levels. Please refer to AN-835 for more background on High Speed ADC testing.
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