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vtbl broken in ldf after update 9

Question asked by Stephane on Mar 28, 2011
Latest reply on Mar 29, 2011 by CraigG

Hi,

 

I have a project which was perfectly working on BF536, with Instruction Cache + 1 bank of Data Cache.

 

Before updating, the ldf file had the folowing mapping in this order:

L1_data_b_1

L1_data_b_bsz

L1_data_b_tables for vtbl, ctor, ctorl

L1_data_b for cplb_data, voldata, data1 and constdata

bsz_L1_data_b

L1_data_b_stack_heap

 

after updating to update 9 and regenerating:

L1_data_b_tables for ctor, ctorl

L1_data_b_1

L1_data_b_bsz

L1_data_b for cplb_data, voldata, data1 and constdata

bsz_L1_data_b

L1_data_b_2 for vtbl

L1_data_b_stack_heap

 

Why oh why the vtbl has been retrograded to such a low priority ???

As it's mapped only in L1_data_b_2, it does not even link because the section is full of data1.

 

When creating a new project vtbl can also be placed in sdram0_bank2. Ok it can link.

But isn't it essential to place the vtables in level 1 SRAM ?

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