I'm using the 2R/2T mode and the 2R/2T timing. But, I'm getting I/Q data swapped for some reason. I have timing closure in the FPGA, and I am receiving data reliably. I'm using the PRBS test mode to check these things step by step.
I set up the PRBS test mode with channel 2 I/Q masked + channel 1 Q masked. Register 0x3f4 = 0x09, 0x3f6 = 0x38. I expect to see channel #1 I data with the PRBS sequence. What I see is 0's for I and data for Q. However, the Q data is following the expected PRBS sequence for I. Putting a scope on the PCB, I see RX data switching on the falling edge of DATA_CLK. It should be rising edge for I data and falling for Q data.
I can repeat the test with channel #1 I masked and I see the opposite results. There is something missing here, that I haven't been able to figure out. Does anyone have suggestions? Is the datasheet correct?