I have a requirement where I'd like to use the HMC988. My requirement will require for me to modify an input clock via a Divide-By factor to produce a new output clock.
For my clocking requirement, the output clock must maintain a 50% duty cycle. Although nothing is mentioned in the HMC988 datasheet about output duty cycle of a divided-by clock input, I would like to be sure that the HMC988 is designed to produce a 50% duty cycle clock on it's output.
Would any one be able to help? Thank you in advance!