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BF518 UART determinism / latency

Question asked by RobertCraig on Jun 11, 2015
Latest reply on Jun 22, 2015 by Aaronwu

I'm trying to get some low latency, deterministic response from the uClinux UART code in bfin_uart.c  I'll be receiving a record that I need to process / forward in a minimum amount of time.  The default code has pretty horrible jitter (> 10 ms of delay in receiving the record.


Making a simple change


#define DMA_RX_FLUSH_JIFFIES    (1)


(from (HZ/50)) greatly improved the jitter to ~1ms (with a 1KHz OS tick).


I'm assuming that  the way the driver works is a combination of polling / interrupt.  I'm guessing that, with the 2D DMA, an interrupt is given per row (which appears to be 512 bytes).  I've tried reducing that to 2, but it appears that the polling aspect is still critical, likely because there's the polling still has to kick in if there's < 2 bytes waiting to get picked up in a row.


  So my questions are: 

Is there anyway to make this code fully interrupt driven, preferably with an interrupt given for every character so that a character becomes immediately available as soon as it is read.


Secondly, is it possible to set the OS tick rate to > 1000Hz.  The config allows for CONFIG_HZ_1000=y, but I can't figure out how to set the rate larger than this (I'd like to try 2000 Hz to "see what happens").



         Robert Craig.