I have an AD9910 on a custom board with a 25Mhz crystal on the refclock input. The cristal pin is high and the cristall shows oszillation if the PLL_ENABLE register is active else not. In that case I do also see a clock signal at the ref clock out pin. The PLL loop filter I did equip by the provided tool. However I do not get the PLL to lock. There is not even a measureable ac signal at the PLL loop filter pin only the voltage varies dependen on the adjustments on the fractional N divider etc. What can I do to further debug the problem? Are there standard testing values for the corresponding programming registers?
Thanks for any help.