I am developing an application on 21489 ez-board and CLKIN on this ez-board is 25MHz. I am using PCG to generate Bit Clock and Fs from the CLKIN for SPORTs and Codec. My question is, how to calculate exact Clock Divider value for PCG to generate Fs @44.1KHz in both cases I2S and 8-channel TDM case? is it possible to generate exact 44.1KHz with this CLKIN?
Can anyone please answer above questions? Your help will be appreciated.