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cp_vid_std[7:0] (IO Map, Address 0x05[7:0]) of ADV7480.

Question asked by Tamu on Jun 8, 2015
Latest reply on Jun 11, 2015 by Tamu

Hello,

 

I have questions about register cp_vid_std[7:0] (IO Map, Address 0x05[7:0]) of ADV7480.

We think we don't have to change cp_vid_std according to HDMI input resolution.

 

Your S/W driver(SRC-Rel1.5.0_BETA) seems to set cp_vid_std to "0x53" (720p) fixed.
Even if HDMI input resolution is changed, cp_vid_std is not changed.

 

Meanwhile, there are example descriptions about cp_vid_std, de_h_start and de_h_end
on ADV748x_Recommended_Settings document page 11 and 12 as follows:

Example 1: cp_vid_std[7:0] = 0x53 (720p), 0x54 (1080i) or 0x5E (1080p). Video input is 720p with Hsync width of 40 pixel clock cycles
Example 2: cp_vid_std[7:0] = 0x53 (720p), 0x54 (1080i) or 0x5E (1080p). Video input is 1080i with Hsync width of 44 pixel clock cycles
Example 3: cp_vid_std[7:0] = 0x53 (720p), 0x54 (1080i) or 0x5E (1080p). Video input is 1080p with Hsync width of 44 pixel clock cycles
Example 4: cp_vid_std[7:0] = 0x53 (720p), 0x54 (1080i) or 0x5E (1080p). Video input is 480p with Hsync width of 62 pixel clock cycles

 

The "cp_vid_std[7:0] is fixed 0x53 (720p) and de_h_start and de_h_end are changed appropriately" looks like your recommendation.

 

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Question 1:
  Do you recommend cp_vid_std[7:0] = 0x53 (720p) fixed?

 

Question 2:
  HDMI must support VGA (640x480).
  When HDMI VGA input to ADV7480 and cp_vid_std[7:0] is fixed 0x53 (720p),
  how should we set de_h_start and de_h_end?
  There are no example description when video input is VGA, so we don't know the register value and sequence.

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Thank you!
Best regards.

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