AnsweredAssumed Answered

Cache for BF524/ improve MIPS

Question asked by mbalan on Mar 22, 2011
Latest reply on Apr 21, 2011 by deepak.raghotham

Hello ,

 

I am currently using the ADSPBF524 PAVpipe board. I am following the file-io demo that came along with the VisualDSP package which uses the cache for BF533 alone( SoftwareModules\MPEG-4_HE-AAC_v2_Decoder-BF-Rel5.3.3_EVAL\example\file-io).  I created the same demo for BF524 and it works well on the simulator. Then I loaded the code onto the board using the emulator without the cache option enabled. The performance characteristics of the decoder are shown below. The MIPS cycles are more and it's really slow. 

 

Audio sample rate is 48.0 kHz;
Compressed data bit rate is 46 kbits per second.
Max Cycles = 5737783
Avg MIPS = 261.804925

 

Now I want to use the emulator with the cache option. So, I enabled the instruction and data cache in the Project Options -> Startup code Tab and followed the same procedure as in the demo. And I got the following performance characteristics

 

Audio sample rate is 48.0 kHz;

Compressed data bit rate is 46 kbits per second.

Max Cycles = 787095

Avg MIPS = 34.640648

 

Though the MIPS count is shown less, the code took about the same time to run. Is there a way to optimize the use of the cache and lower the MIPS count further? I have attached the LDF file of the program for your reference. Please let me know if there are some changes that can be made to the memory configuration which will enhance the performance of the decoder.

 

Thanks

Mahadevan

Attachments

Outcomes