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ADAU1761 I2S serial port sampling rate 96 kHz input config

Question asked by Sam.S on Jun 4, 2015
Latest reply on Jun 18, 2015 by DaveThib

Hello,

 

    Our customer met an issue in ADAU1761 serial port sampling rate 96 kHz I2S input,


the LRCLK = 96 kHz, MCLK = 24.576 MHz; If the settings as below:



clock source set as PLL clock, input Master clock frequency = 256 x fs,

integer type, X = 1, R = 2

--> ((96 kHz x 256) / X ) * 2 = 49.152 MHz,


clock source set as PLL clock, input Master clock frequency = 512 x fs,

integer type, X = 2, R = 2

--> ((96 kHz x 512) / 2 ) * 2 = 49.152 MHz,



there are no any sound;


or set


clock source set as direct from MCLK, integer type, X = 1, R = 2

--> ((96 kHz x 512) / X ) * 2 = 49.152 MHz, can hear the sound, but the sound quality is poor.


How can we set the correct settings to get the good quality sound in 96 kHz I2S input?


Thank you .

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