Mitesh

I installed the FIR DMA interrupt handler on ADSP-SC58x, but still the interrupt doesn't occur, what I may be missing?

Discussion created by Mitesh Employee on Jun 3, 2015

The FIR interrupt is edge sensitive. Both for ARM and SHARC cores, you need to configure the FIR interrupt as edge sensitive in the SEC (SHARC) and GIC (ARM). The following code can be used for this purpose:

 

For GIC:

adi_gic_ConfigInt(INTR_FIR0_DMA, ADI_GIC_INT_EDGE_SENSITIVE, 0);

 

For SEC:

adi_sec_EnableEdgeSense(INTR_FIR0_DMA, true);

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