I m trying to write and read data into SRAM connected to SMC_AMS1. In datasheet page 8 indicates bank1 starts from 0xB400 0000 but when i got ldr file which CCES creates automatically, i m seeing Bank1 starts from 0xB8000000. I think there is confliction between datasheet and CCES map.
So when i try to access SRAM over AMS1 by addressing 0xB4000000 it actualy tries to to use AMS2.
Could you please explain this confliction?