We are using the ADSP-21489 DSP in our prototype design. I’m hoping to have the following amount of memory available to the DSP:
SRAM = 16Mbytes, 10ns speed minimum
SDRAM = 128Mbytes, 10ns speed minimum
Flash = 1GByte, SPI interface
DPRAM = 70V27L15PFG already selected
The eval kit is set up for 2Mbyte SRAM, 32Mbyte SDRAM, 4Mbyte Flash.
The problems I’m having so far are the availability of large
SRAM and SDRAM in single chip packages. From looking at the DSP, it seems that
the DSP can’t run DDR SDRAM. Regular SDRAM 3.3V logic tops out at about
256Mbits (32Mbytes). For SRAM 3.3V, the parts get really expensive after
How can we increase the memory access for the DSP?