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ADV7619 corrupted clock & data with 3840x2160p30 input

Question asked by rpdm on May 29, 2015
Latest reply on Oct 15, 2015 by mattp



On some ADV7619 devices, we're finding that resolutions like 1920x1080p60 work fine, but with 3840x2160p30 we're getting bad clock & data from the chip.



1. Clock occasionally glitches, phase-shifting by 180 degrees.

2. Vsync from chip may occur at random, for as little as one clock cycle.

3. DE can be corrupted.

4. Video data can be corrupted, showing wrong colours.


On some test boards, the chips appears to work correctly, but on others it always gives the above problems.  It's as if the ADV7619 is not switching into CP_BYPASS mode for this 297MHz source, and the corruption is down to trying to feed through the CP core.


(A related question of mine on this forum regarding clock inversion for 2160p sources does not seem to apply when in this failure mode - thereby again implying that the chip has not bypassed the CP core.)


Note that we're setting IO map register 0xBF bit 0 to 0, despite some references in the user guide and on this forum to set it to 1.  There are many contradictory references to this register setting!  It would be good for them all to be cleared up.


We have checked all power rails, noise levels, and the working & non-working boards are identical - including all registers set.


Various different equalizer settings have been tried, using the methods given in this forum - none have any effect.  Cable length is 1m from a known-good source (two sources were tried with the same result, as were 2m cables).


Any suggestions on what might be going on here would be appreciated.