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ADV7619 clock inversion with 3840x2160p30 input

Question asked by rpdm on May 29, 2015
Latest reply on Nov 17, 2015 by rpdm



During our testing of this part, it appears as though the LLC output clock is inverted - but only for 4k sources.  (E.g. 1080p60 sources are non-inverted, and follow the datasheet timings.)


We're having to invert the clock back again (IO map register 0x06, bit 0 = 1) in order to get the correct timing as per the AD datasheet.


Is this normal behaviour?  Is it as a result of the halving of the clock frequency and/or the CP bypass?


I cannot see this documented anywhere in the datasheet or app. notes, nor anywhere on the Engineering Zone.