Hi evry body,
I'm using an FPGA stratix III to control the DDS through the evaluation board.Since i did'nt not success with the serial programming, i want to try the parallel one.
My problem is that, waht is the step to generate a single tone frequency using the PLL.
In the gerber file it's mentionned that the five resistor of 0 ohm have to be removed for parallel use..Is it right??