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AD9910 datasheet error? (Data assembler hold last value.)

Question asked by DavidLee on May 23, 2015
Latest reply on May 25, 2015 by LouijieC

In the datasheet for the AD9910:

http://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf

on page 58. The description for the function of bit 6 of CFR2 reads:

Ineffective unless CFR2[4] = 1.

 

0 = the data assembler of the parallel data port internally forces zeros on the data path and ignores the signals on the D[15:0] and F[1:0] pins while the TxENABLE pin is Logic 0 (default). This implies that the destination of the data at the parallel data port is amplitude when TxENABLE is Logic 0.

 

1 = the data assembler of the parallel data port internally forces the last value received on the D[15:0] and F[1:0] pins while the TxENABLE pin is Logic 1.

I think the description for state 1 is in error. Shouldn't this be describing the data hold functionality when TxENABLE is logic 0?

I.e., the text "while the TxENABLE pin is Logic 1" should read "while the TxENABLE pin is Logic 0." ?

 

Cheers,

David

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