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9361 Clock Divider causing coherency problem between tunes

Question asked by wpearson on May 22, 2015
Latest reply on Jun 8, 2015 by wpearson

We have been running some tests on the FMCOMMS5 board where we are tuning it externally from an AD5355PLL.  What we are seeing appears to be random 180deg phase shifts between 9361 device 1 and 9361 device 2.  We have everything else configured correctly, but whenever we re-tune it's hit or miss which phase state one 9361 will be in with relation to the other.  My guess is the internal clock divider is causing these issues.  During a re-tune the LO is bouncing and in a state where one clock divider may trigger on it and the other does not, causing one device to slip (non-deterministic) 180deg out from the other.  Obviously for beamforming this is critical.

 

Is this a known problem?  How are others working this?

 

We have a requirement for fairly rapid tuning and doing a phase cal for every tune does not make sense.

 

Any help or ideas would be appreciated.

 

We've turned on the "Mute until lock" bit in the 5355 but that didn't seem to help either.

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