I am interested in using the AD9551 to get the precise frequency control, but wanted to know what, if any, concerns there are in using a clock with a fractional N PLL as opposed to one using an integer N PLL
PLLs typically fall into either fractional or integer types. This type refers to the ratio of the input reference frequency to the output frequency. If the PLL is capable of non-integer division then it is a fractional PLL. Example of integer PLL is: Fvco/Freference = N with no remainder. But there are times when a frequency translation between input and ouput is non-integer which is the case for network frequency translation and the need for the AD9551. The AD9551 uses a sigma delta modulator to modulate the N division. For a kth order modulator is used to add a fractional portion to the N count by a factor of -2^k to 2^k-1. The modulation of the N division can be thought as quantizing the N count. Quantizing adds noise and squrious to the system. The AD9551 applies noise shaping and filtering to lower this noise to pass network standards specifications.
There is often more than one configuration of the AD9551 to acheive the same frequency translation. The AD9551 evalution board software will list all possible solution. The best solution for noise and spurious can be found by testing each configuration.
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