I'm trying to verify the Tx path of RF in AD9364 with KC705.
The configuration is the default one from reference design (I have taken the latest code for 'No-OS'). It's in FDD and LVDS mode.
I set the Tx synthesizer frequency to 1900 MHz and RF Tx bandwidth to 5MHz. Reference clock is external and have set the same value (38.4MHz) to reference_clk_rate (in init param). After the initialization of the board, there is no loopback enabled so that the data goes out.
In the spectrum analyzer, I can see the LO frequency very close to the tuned frequency (1900) but the power I see is very less (around -60dbm).
Another observation is, if I send data (say in 12MHz), then I see the LO in good power (between -22dbm to -10dbm). Also I see two peaks with almost same power and about 2MHz apart. I couldn't understand the reason behind this.
1. What are the parameters to consider for correctly tuning the LO frequency alone (without sending data) and getting it correctly in VSA? Please share any formula of calculation is available.
2. What can I do to increase the LO power?
3. How to relate the spectrum correctly when data is sent or not sent?
Thank you in advance,