What happens in the harmonics calculation when the ADC voltage signal is below 100mV peak?.
Thanks in advance and best regards
Yes! The current channel amplitudes can be smaller. But the key point here is that, for any harmonic computation result to be used, even if it is only current channel related, please make sure that the voltage channel amplitudes are above 100mVpeak level. This is important for the IC to identify and track the fundamental line frequency.
It is recommended to keep the voltage signals above the 100mVpeak level because all the testing for harmonic computations was done with such large voltage signals. If the voltage signal is smaller than that, you might see some deterioration in performance of the harmonic computations. I do not have any data on that to share with you. But usually the line voltage max value is set at (half full scale) 250mVpeak going into the IC. I think the line voltage being 2.5 times lower than the max voltage, during normal operation, is not expected. So, there should not be any problem in meeting this condition, I would assume. Do you agree?
I agree with you if we consider the ADE7880 voltage channels (VA, VB, VC). But I was referring to the harmonics calculation for the current channels (IA, IB, IC, IN). In these case the signal at the ADC input may fall below 100mV.
Is that correct?
thank you so much fo your support.
It's the answer I was looking for.
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