I am using the AD9951. My observation with this IC is that the output frequency accuracy depends on the system clock of the DDS; or in other words, depends on the multiplication factor in the CFR2 register. When generating an output frequency of 30 MHz at different system clocks, I measured following values:
SysClk = 400 MHz -> measured = 28.12 MHz
SysClk = 380 MHz -> measured = 29.58 MHz
SysClk = 360 MHz -> measured = 30.00 MHz
SysClk = 340 MHz -> measured = 30.00 MHz
SysClk = 320 MHz -> measured = 30.00 MHz
If the system clock is below 380 MHz, the accuracy is very high. What are possible reasons that the accuracy cannot be reached over the entire specified frequency range?
Thanks in advance.