I am using some of the peripherals on the ADuCRF101 – which is Cortex-M3 based – and don’t understand why I have difficulty clearing some interrupts.
The interrupt immediately re-enters, but I am sure I have cleared it!
What am I forgetting?
The problematic interrupts are those that require a write to a MMR register to clear, and seems to be present if I put that write near the end of the C function handler or if I code it in assembler.
The Cortex-M3 has a write buffer.
Any interrupts that require a write to a register to clear are advised to be cleared at the start of the interrupt handler.
The issue of putting it at the end – for example as the last instruction in the handler – is that the compiler will very likely encode it as follows.
STR Rx,[Ry] ; Clear the interrupt
The tail chaining exception exit sequence will be triggered, and effectively not clearing the interrupt until the handler has exited. (The interrupt is still pending at the time of exit!)
Avoid this by writing early or using the DSB instruction.
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