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ADV7441A HDMI Receiver chip Audio

Question asked by hitesh.patel@einfochips.com on Mar 7, 2011
Latest reply on Mar 15, 2011 by mattp

Hi All,

 

I have my custom board where we have connected ADV7441A HDMI audio out to DM6467 MCASP0.

I configured ADV7441A in I2S mode.I can get MCLK as 12.287MHz,SCLK  as 3.072 and LRCLK as 48KHz.

 

I always get SCLK as 3.072MHz though I set REGISTER_03H register of HDMI Map is 0x18 means 24 bit width of word.

 

1)Is there any setting so I can change SCLK from 3.072MHz to 1.536MHz? I tried with different I2S Bit Width but SCLK remains same that is 3.072MHz.

2)How can I set I2S Bit Width as 32 bit?

3)Is there any mode or setting so I can put ADV7441A in slave mode?

 

Thanks & Regards

Hitesh Patel

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