What is the sequence of events when switching between channels for the AD719x when the sequencer is enabled and continuous read mode is selected?
When the sequencer is enabled, the ADC automatically sequences through the enabled channels.
When several channels are enabled, the bit DAT_STA in the mode register should be set to 1. When DAT_STA equals 1, the contents of the status register are output with each conversion. The LSBs of the status register indicate the channel to which the conversion corresponds. With continuous read mode enabled, the user only needs to apply the SCLK pulses when a conversion is available (/RDY goes low) – a write to the communications register for each read of the data register is not required.
The sequence of events using the AD7190/AD7192, for example, is as follows (channels AIN1-AIN2 and AIN3-AIN4 being used). The operating conditions for both channels are 50 Hz output data rate, internal master clock, gain = 1, buffer on, bipolar mode, external reference applied between REFIN1(+) and REFIN1(-) is reference source for the ADC.
Write 0x8 to communications register: This specifies that the next operation is a write to the mode register.Write 0x180060 to mode register: This configures the AD719x for an output data rate of 50 Hz, the internal clock is used and but DAT_STA is set to 1.Write 0x10 to communications register: This specifies that the next operation is a write to the configuration register.Write 0x000310 to configuration register: This configures the AD719x for the above gain, polarity, and reference source and selects channel AIN1-AIN2 and AIN3-AIN4.
Write 0x5C to the communications register: This specifies that the serial interface is dedicated to continuously read the data register until this function is disabled.
Continuously running the following loop allows conversions to be read back from the 2 channels continuously.Poll DOUT//RDY: Poll the DOUT//RDY pin to determine if valid data is available in the data register. When DOUT//RDY goes low, apply 32 serial clocks to clock the data from the ADC. A read should not be initiated when DOUT/ is high.
To disable continuous read mode, the command 58 hex is written to the communications register when /RDY is low.
Message was edited by: MClifford
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