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Interfacing AD9834 output to build in comparator?

Question asked by Judson on Feb 15, 2011
Latest reply on Apr 19, 2011 by leoxu

I am looking for some guidance to connecting the AD9834 output to it's build in comparator.  I am not very familiar with current DACs, filters, etc, and what I really want is a very finely granular square wave clock source with "OK" jitter performance to clock a Delta Sigma ADC.

 

I noticed a few basic points:

- Built in coupling capacitor on the comparator input.

- 4 mhz highpass cutoff on this input.

- 100mV p-p sensitive.

- DAC output looks like it can run in single ended mode.

- DAC is "high impedence", I assume  6.8k+ (i.e. R-SET + some additional current adjusting resistance)?

 

I also read AN-837 at http://www.analog.com/static/imported-files/application_notes/351016224AN_837.pdf

 

It sounds like I need to create a circuit with these characterstics:

 

- 200ohms of resistance at the output terminal Iout and 20pf of capacitance to ground, according to the datasheet description of the Iout pin.

- An LC network filter with sharp roll off just after the frequency of interest.

- Greater than 100mV p-p at the output of the filter going into the comparator, greater than 3-4MHz.

 

Would the 200 ohm resistance to ground used at the Iout pin count as my  shunt connection, which I can then treat the node as a high impedence voltage  connection, and have my first filter element as a series element, rather than a shunt element?

 

For the filter, I am using the following filter generator:

http://www-users.cs.york.ac.uk/~fisher/lcfilter/

I am given an option for a characteristic impedence.  What should I do about characteristic impedence?  Should I be doing any additional matching at the terminals in/out of the DDS with resistors?  Should I care at all if my circuit is physically small, since both ends terminate at the same IC?

 

Also, if I want to simulate this circuit in SPICE, what would I use as my signal source to emulate the "high impedence" DAC?

 

And one last thing, if I assume the corner frequency is at 4mhz, and it is sensitive to 100mV p-p signals, I would want my filter output to be above 100mV / 0.707  @ 4mhz to be above the trip point, so 200mV @ 4mhz should be plenty, correct?  I am thinking that one of my final design steps will be to measure the input to the comparator at 4mhz and verify that it is greater than 200mV.

 

Thanks for any help.

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