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setting BFLAG_quickboot Code Clock flag

Question asked by AviMagos on Feb 14, 2011
Latest reply on Apr 4, 2011 by CraigG

Hi,

 

I'm trying to implement quickboot in my code.

Specifically, I want to mark several blocks in the ldr with the BFLAG_quickboot flag - and thus prevent them from being re-loaded from the flash to the DRAM when waking up from hibernate state (AKA "warm boot").

 

According to the loader utility manual this is done by adding the following switch to the elfloader command line:

"-quickboot sec=section".

 

From here on things become vague.

I guess "section" should be replaced with an output section defined in my ldf.

I have such a section called "sdram_bank0" for example.

 

it is defined as follws in the ldf:

 

PROCESSOR p0
{
   OUTPUT($COMMAND_LINE_OUTPUT_FILE)
   RESOLVE(start, 0xFFA00000)
   KEEP(start, _main)
  
   /*$VDSG<insert-user-ldf-commands>                            */
   /* Text inserted between these $VDSG comments will be preserved */
   /*$VDSG<insert-user-ldf-commands>                            */
  
   SECTIONS
   {
      /* Workaround for hardware errata 05-00-0189 and 05-00-0310 -
     ...

sdram0_bank0
      {
         INPUT_SECTION_ALIGN(4)
        
         /*$VDSG<insert-input-sections-at-the-start-of-sdram0_bank0>  */
         /* Text inserted between these $VDSG comments will be preserved */
        
         INPUT_SECTIONS($OBJECTS(sdram0_bank0) $LIBRARIES(sdram0_bank0))
         INPUT_SECTIONS($OBJECTS(mem_retained_win_data) $LIBRARIES(mem_retained_win_data))
         INPUT_SECTIONS($OBJECTS(mem_retained_mean_data) $LIBRARIES(mem_retained_mean_data))
         INPUT_SECTIONS($OBJECTS(mem_retained_twid_data) $LIBRARIES(mem_retained_twid_data))
         INPUT_SECTIONS($OBJECTS(mem_retained_beamforming_mat) $LIBRARIES(mem_retained_beamforming_mat))
         INPUT_SECTIONS($OBJECTS(mem_retained_BF_mapping) $LIBRARIES(mem_retained_BF_mapping))
         INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor))
         INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl))
        
         INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl))
         INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt))
         INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti))
         INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt))
         INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht))
         /*$VDSG<insert-input-sections-at-the-start-of-sdram0_bank0>  */
        
         RESERVE(heaps_and_stack_in_L3, heaps_and_stack_in_L3_length = 2048,4)
         RESERVE_EXPAND(heaps_and_stack_in_L3, heaps_and_stack_in_L3_length , 0, 4)
         ldf_heap_space = heaps_and_stack_in_L3;
         ldf_heap_end = (ldf_heap_space + (heaps_and_stack_in_L3_length - 4)) & 0xfffffffc;
         ldf_heap_length = ldf_heap_end - ldf_heap_space;
      } > MEM_SDRAM0_BANK0
     
}

}

 

I added the follwoing line to the loader command line (either running manually from command line or when using the project options "additional options" text box):

-quickboot sec=sdram0_bank0.

 

The output of the loader was:

Process file: .\Debug\DataProc1.dxe
        Process section: sdram0_bank0
                Section start address: 0x4
                Section byte count: 0x32ABC
        Process section: sdram0_bank1
                Section start address: 0x400000
                Section byte count: 0x192804
        Process section: sdram0_bank2
                Section start address: 0x800000
                Section byte count: 0xA7000
        Process section: sdram0_bank2_align2
                Section start address: 0x8A7000
                Section byte count: 0x1F8
        Process section: sdram0_bank3
                Section start address: 0xC00000
                Section byte count: 0xCB6E6
        Process section: L1_data_A_buffer
                Section start address: 0xFF800000
                Section byte count: 0x6800
        Process section: L1_data_a_tables
                Section start address: 0xFF806800
                Section byte count: 0x8
        Process section: L1_data_a
                Section start address: 0xFF806808
                Section byte count: 0x584
        Process section: bsz_L1_data_a
                Section start address: 0xFF806D8C
                Section byte count: 0x28C
        Process section: L1_data_B_buffer
                Section start address: 0xFF900000
                Section byte count: 0x6800
        Process section: L1_data_b
                Section start address: 0xFF906800
                Section byte count: 0x800
        Process section: L1_code_b
                Section start address: 0xFFA00000
                Section byte count: 0xAE
        Process section: L1_code
                Section start address: 0xFFA000B0
                Section byte count: 0xE08
        Process section: L1_code_b
                Section start address: 0xFFA08000
                Section byte count: 0x3FB0

 

In order to check if this worked I used the ldr viewer utility, and found the block starting at address 0x4 (which is presumably where sdram0-bank0 section was mapped to).

However when looking at the flags I could not see that BFLAG_QUICKBOOT was indeed set (the flags contents was : 0xADDA0002).

I tried several variations of the switch as follows:

-quickboot sec="sdram0_bank0"

-quickboot sec=_sdram0_bank0.

But to no avail.

 

Does anyone have an example of how this is done?

I appreciate your help,

 

BTW - I'm using Blackfin 518F processor, and the full elfloader command line (taken from the visual DSP building log) was:

"C:\Program Files\Analog Devices\VisualDSP 5.0\elfloader.exe" .\Debug\DataProc1.dxe -b Flash -f HEX -Width 8 -v -o .\Debug\DataProc1.ldr -No2Kernel -quickboot sec="sdram0_bank0" -si-revision 0.0 -proc ADSP-BF518 -MM

 

Avi.

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