I have a question about Data RAM of ADAU1401.
Is Data RAM initialized? (Zero clear?)When is it initialized? (Startup?)Or, isn't the initialization done, because the user can not access Data RAM?
I believe the data RAM is initialized on startup, but as you mentioned, the modulo section of the data RAM is not accessible by the user, so that's not easy to verify.
If you need to manually zero the data RAM during operation of the device, choose the "zero in-out registers" option the DSP core control register, then wait as long as the longest delay in your project. For example, if your longest delay in the SigmaStudio project is 1000 samples, then you would have to wait 1000 samples for all of the data RAM currently in use to be cleared.
Thank you for your feedback.
I'm not sure about the "zero in-out registers" which you described.Is The "zero in-out registers" the part of the function of DSP core control register?I could not find a description of the "zero in-out registers" in Datasheet.Could you describe about the "zero in-out registers" more details, please?
Best Regards, TomY
I'm referring to the CR bit in the DSP Core Control Register. Documentation is attached.
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